Intel Paves Way To A Trillion Transistors In Next-Gen Chips By 2030: Moore’s Law Lives On
Intel Research has demonstrated at IEDM how Moore’s Law is still valid and how Chipzilla intends to sell next-generation processors that include one trillion transistors by 2030.
Moore’s law continues to be supported by Intel Research, which paves the way for one trillion transistors by 2030.
Statement to the Press: Intel plans to announce a 10x density enhancement in packaging technology at IEDM 2022, which will coincide with the 75th anniversary of the invention of the transistor. Additionally, the company plans to employ a unique material with a thickness of only 3 atoms to accelerate transistor scaling.
What’s New: Today, Intel revealed research discoveries that will feed its innovation pipeline and help keep Moore’s Law on pace to achieve one trillion transistors on a package within the next ten years.
At the IEEE International Electron Devices Meeting (IEDM) 2022, researchers from Intel displayed advancements in 3D packaging technology, including a new 10x improvement in density; novel materials for 2D transistor scaling beyond RibbonFET, including ultra-thin material that is only 3 atoms thick; new possibilities in energy efficiency and memory for higher-performing computing; and advancements for quantum computing.
“Seventy-five years since the invention of the transistor, innovation driving Moore’s Law continues to address the world’s exponentially increasing demand for computing. At IEDM 2022, Intel is showcasing both the forward-thinking and concrete research advancements needed to break through current and future barriers, deliver to this insatiable demand, and keep Moore’s Law alive and well for years to come.”— Gary Patton, Intel vice president, and general manager of Components Research and Design Enablement
What You Need to Know About the IEDM: At the International Electron Devices Meeting (IEDM), Intel Executive Vice President and General Manager of Technology Development Dr. Ann Kelleher will preside over a plenary session to mark the 75th anniversary of the invention of the transistor.
Kelleher will discuss how the industry can continue to innovate in the future, as well as ways in which it can more effectively innovate to keep up with Moore’s law. He will do this by rallying the ecosystem around a systems-based strategy to meet the growing demand for computing worldwide.
The session was entitled “Celebrating the 75th Anniversary of the Transistor! On Monday, December 5 at 9:45 am Pacific Standard Time, there will be a presentation titled “A Look at the Evolution of Moore’s Law Innovation.”
Why It Matters: Moore’s Law is vital to addressing the world’s insatiable computing needs as surging data consumption and the drive toward increased artificial intelligence (AI) brings about the greatest acceleration in demand ever seen. Moore’s Law is vital to addressing the world’s insatiable computing needs as surging data consumption and the drive toward increased artificial intelligence (AI).
Moore’s Law rests on one of its most important pillars: constant innovation. The Components Research Group at Intel originated many of the most important innovation milestones that have led to ongoing power, performance, and cost improvements over the past two decades. These include strained silicon, Hi-K metal gate, and FinFET. These innovations have been implemented in personal computers, graphics processors, and data centers.
On the agenda for today is more research, such as RibbonFET gate-all-around (GAA) transistors, PowerVia back-side power delivery technology, and packaging advances like EMIB and Foveros Direct.
At IEDM 2022, Intel’s Components Research Group demonstrated its dedication to continuing Moore’s Law by innovating in the following three key areas: new 3D hybrid bonding packaging technology to enable seamless integration of chiplets; super-thin, 2D materials to fit more transistors onto a single chip; and new possibilities in energy efficiency and memory for higher-performing computing. This demonstration took place at the International Electron Devices Meeting 2022.
Components Research Group researchers have found novel materials and technologies that blur the border between packaging and silicon, which is how we do it.
We discuss the critical next steps that need to be taken to extend Moore’s Law to include a trillion transistors on a single package. These steps include the development of advanced packaging that is capable of achieving an additional ten times the interconnect density, which will ultimately result in quasi-monolithic chips.
Because Intel innovates materials, practical design choices have been identified that can meet the requirements of transistor scaling using novel material that is just three atoms thick. This enables the company to continue scaling beyond RibbonFET, the previous method of scaling.
For the next generation of 3D packaging, Intel has introduced chips that are quasi-monolithic:
Compared to Intel’s research presentation at IEDM 2021, the most recent hybrid bonding research that Intel conducted and presented at IEDM 2022 demonstrates an additional 10 times improvement in density for power and performance.
It is possible to obtain interconnect densities and bandwidths comparable to those seen on monolithic system-on-chip connections by continuing to scale hybrid bonding down to a pitch of 3 um.
To cram more transistors onto a single chip, Intel is looking into the use of ultrathin ‘2D’ materials:
At ambient temperature and with a low leakage current, Intel developed a gate-all-around stacked nanosheet structure by employing a 2D channel material that was only three atoms thick. This allowed the company to achieve near-ideal transistor switching on a double-gate structure.
These are two important steps that need to be taken to stack GAA transistors and get beyond the fundamental limitations of silicon.
The researchers also provided the first thorough investigation of electrical contact topologies to 2D materials. If successful, this research might further pave the way for high-performing and scalable transistor channels.
For higher-performance computing, Intel delivers new options in terms of energy efficiency and memory:
Intel is working to redefine scalability by inventing memory that can be put vertically above transistors to make more efficient use of the space on chips.
Intel has demonstrated stacked ferroelectric capacitors, which are a first for the industry. These capacitors equal the performance of traditional ferroelectric trench capacitors and may be used to create FeRAM on a logic chip. This is an industry first.
In a big step forward for Intel’s efforts to enable industry tools for developing innovative memories and ferroelectric transistors, a device-level model that captures mixed phases and defects for better ferroelectric hafnia devices has achieved a first in the industry.
Intel is now working on developing a realistic path to 300-millimeter GaN-on-silicon wafers to bring the world one step closer to migrating beyond 5G and solve the difficulties of power efficiency.
Intel’s innovations in this field have demonstrated a gain that is 20 times greater than the GaN standard used in the industry and have established a new figure-of-merit industry record for high-performance power delivery.
Data may be stored in Intel’s “transistors that don’t forget” even when the power is turned off since the company is making significant strides in developing energy-efficient technologies.
Already, researchers at Intel have been successful in overcoming two of the three obstacles that prevented the technology from being completely viable and operational at ambient temperature.
Intel continues to pioneer innovative ideas in the field of physics by making strides toward the development of more advanced qubits for quantum computing:
Researchers at Intel are working to find better ways to store quantum information by gaining a better understanding of the various interface defects that could act as environmental disturbances affecting quantum data. They are doing this by gathering more information about these defects.